Computational Sprinting

While conventional processor designs (including their energy delivery systems and heat sinks) are designed primarly for sustained performance, we pose the question: "What would a system look like if designed to provide responsiveness during bursts rather than with a singular focus on sustained performance?" Our approach, called computational sprinting is aimed at mobile environments like smart-phones, where many interactive applications are characterized by short bursts of computational demand punctuated by long idle periods waiting for user input. Computational sprinting activates otherwise powered-down cores for sub-second bursts of intense parallel computation in response to such sporadic user activity. During sprints, the processor generates heat at a rate that far exceeds the thermal (cooling) and electrical (power delivery and stability) capacities of a typical smart-phone like device. This project therfore explores various thermal, electrical, architectural and software/runtime aspects to effectively facilitate sprinting for short time durations overcoming the physical challenges inherent in our target environments.

Publications

Pitfalls of Accurately Benchmarking Thermally Adaptive Chips
Laurel Emurian, Arun Raghavan, Lei Shao, Jeffrey M. Rosen, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
Workshop on Duplicating, Deconstructing, and Debunking (WDDD), June 2014
On-chip Phase Change Heat Sinks Designed for Computational Sprinting
Lei Shao, Arun Raghavan, Laurel Emurian, Marios Papaefthymiou, Thomas F. Wenisch, Milo M. K. Martin and Kevin P. Pipe
Proceedings of the 30th Annual Thermal Measurement, Modeling, and Management Symposium (SemiTherm), Mar 2014
Utilizing Dark Silicon to Save Energy with Computational Sprinting
Arun Raghavan, Laurel Emurian, Lei Shao, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
IEEE Micro Special Issue on Dark Silicon, IEEE Micro, Volume 33, Number 5, Sep-Oct 2013
Designing for Responsiveness with Computational Sprinting (IEEE Micro "Top Picks")
Arun Raghavan, Yixin Luo, Anuj Chandawalla, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
IEEE Micro's "Top Picks of 2012" Issue
Computational Sprinting on a Hardware/Software Testbed (ASPLOS best paper award)
Arun Raghavan, Laurel Emurian, Lei Shao, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
In the Proceedings of the 18th Eighteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2013.
Computational Sprinting (HPCA best paper award)
Arun Raghavan, Yixin Luo, Anuj Chandawalla, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
In the Proceedings of the 18th Symposium on High Performance Computer Architecture (HPCA), February 2012

Presentations

Pitfalls of Accurately Benchmarking Thermally Adaptive Chips
Laurel Emurian, Arun Raghavan, Lei Shao, Jeffrey M. Rosen, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
Presented at the Workshop on Duplicating, Deconstructing, and Debunking (WDDD), June 2014. (in conjunction with ISCA 2014)
Talk slides: pptx pdf
Computational Sprinting on a Hardware/Software Testbed
Arun Raghavan, Laurel Emurian, Lei Shao, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
Presented at the 18th Eighteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2013.
Talk slides: pptx
Computational Sprinting Overview Talk -- June 2012
Computational Sprinting on a Real System: Preliminary Results
Arun Raghavan, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
2012 Dark Silicon Workshop (in conjunction with ISCA 2012)
Talk slides: pptx
Computational Sprinting
Arun Raghavan, Yixin Luo, Anuj Chandawalla, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo M. K. Martin
Presented at the 18th Symposium on High Performance Computer Architecture (HPCA), February 2012
Talk slides: pptx

Dissertations

Computational Sprinting: Exceeding Sustainable Power in Thermally Constrained Systems

Press Coverage

'Sprinting' chips could push phones to the speed limit, New Scientist, February 20, 2012, Issue #2852
Could "Computational Sprinting" Speed Up Smart Phones without Burning Them Out?, Scientific American, February 29, 2012
Researchers Propose “Computational Sprinting” To Speed Up Chips By 1000% – But Only For A Second, TechCrunch, February 28, 2012
Researchers propose ‘overclock’ scheme for mobiles; Processing at a sprint to overcome tech limitations, The Register, February 21, 2012
Study explores computing bursts for smartphones, PhysOrg.com, February 21, 2012
Researchers Working on Ways to Put 16-Core Processors in Smartphones, Brighthand, March 18th, 2012

Penn news release and Michigan news release, Feb 28, 2012.

People

Students

Arun Raghavan, University of Pennsylvania (now at Oracle)
Laurel Emurian, Universiy of Pennsylvania (now at Comcast)
Yatin Manerkar, University of Michigan (now at Princeton)
Lei Shao, University of Michigan

Faculty

Milo M. K. Martin, University of Pennsylvania
Thomas F. Wenisch, University of Michigan
Kevin Pipe, University of Michigan
Marios Papaefthymiou, University of Michigan

Past Students

Yixin Lio, University of Michigan
Anuj Chandawalla, University of Michigan

This material is based upon work supported by the National Science Foundation (NSF) by grants CCF-1161505 and CCF-1161681. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.