CIS 371 (Spring 2009): Digital Systems Organization and Design

Instructor:	Prof. Milo Martin
Lecture:	Monday/Wednesday/Friday 3:00-4:30 in Towne 321
E-mail:	cis371@cis
TA:	Santosh Nagarakatte
Grader:	Saumya Jain

This course is the lecture component of CIS372.

Course Schedule

Announcements

[May 1] - The Homework 2 Solutions and Homework 3 Solutions are now available
[Mar 18] - Homework 2 (Due Wednesday, April 1st) and Homework 3 (Due Monday, April 13th) are now available
[Feb 27] - Homework 1 Solutions available
[Feb 14] - Homework 1 (Due Monday, Feb 23rd) is now available
[Jan 26] - Complete web page and tentative course schedule
[Jan 21] - Skeletal web page up

Office Hours

Prof. Martin:
- Monday and Wednesday from 4:30 to 5:30
- Or by appointment
Santosh Nagarakatte's office hours (knock on 614 Levine and check the 6th floor lounge area):
- Monday and Tuesday from 1:30 to 3:00
- Or by appointment

Lecture Notes

Unit 0 - Introduction
Unit 1 - Instruction Set Architectures
Unit 2 - Single-Cycle Datapath and Control
Unit 3 - Arithmetic
Unit 4 - Multi-Cycle
Unit 5 - Pipelining
Unit 6 - Superscalar
Midterm Review
Unit 7 - Caches
Unit 8 - Static and Dynamic Scheduling
Unit 9 - Shared Memory & Multicore
Unit 10 - Virtual Memory & I/O
Unit 11 - Reliability
Unit 12 - Power
Unit 13 - Vectors
Unit 14 - XBox 360

Assignments

Homework 1 - Due Monday, Feb 23rd - Homework 1 Solutions
Homework 2 - Due Wednesday, April 1st - Homework 2 Solutions
Homework 3 - Due Monday, April 13th - Homework 3 Solutions

Schedule

See the course schedule

Course Syllabus

Course Description

This course is the lecture component of the CIS371/CIS372 pair. The focus of CIS371 is on understanding the design and performance of computers. The description from the course catalog:

(Prerequisite(s): CIS 240, knowledge of at least one programming language).
This is the second computer organization course and focuses on computer
hardware design. Topics covered are: (1) basic digital system design
including finite state machines, (2) instruction set design and simple RISC
assembly programming, (3) quantitative evaluation of computer performance,
(4) circuits for integer and floating-point arithmetic, (5) datapath and
control, (6) micro-programming, (7) pipelining, (8) storage hierarchy and
virtual memory, (9) input/output, (10) different forms of parallelism
including instruction level parallelism, data-level parallelism using both
vectors and message-passing multi-processors, and thread-level parallelism
using shared memory multiprocessors. Basic cache coherence and
synchronization.

Prerequisites

CIS240 is an absolute prerequisite for this course. In addition, CIS372 is a co-requisite (that is, you must be taking CIS372 in parallel).

Grading

Grading breakdown for the course is as follows:

Homeworks: 20%
Midterm exams: 30%
Final exam: 48%
Class participation: 2%

Reading Materials

We will use one textbook: Patterson and Hennessy, "Computer Organization and Design: The Hardware Software Interface" (the most recent edition).

Academic misconduct such as cheating will not be tolerated. The work you submit in this class is expected to be your own. If you submit work that has in part or in whole been copied from some published or unpublished source (including current or former students), or that has been prepared by someone other than you, or that in any way misrepresents somebody else's work as your own, you will face severe discipline by the university. (Adapted from text appearing at the Office of Student Conduct page.)

Any detected cases of cheating will be pursued. Penalties can include: receiving a zero on the assignment (the minimum penalty), failing the course, having a note placed in your permanent academic record, suspension, and ultimately expulsion.

See Penn's Code of Academic Integrity for more information.