		.ORIG x0200

        LEA R0, JUMP_TABLE
        NOOP
        NOOP
        LD R1, SWITCHES_ADDR         ; read switches
        NOOP
        NOOP
        LDR R1, R1, 0
        NOOP
        NOOP
        ADD R0, R0, R1          ; compute jump_table + offset
        NOOP
        NOOP
        JUMPR R0

SWITCHES_ADDR .FILL xFE05
        
JUMP_TABLE
        JUMP TEST0
        JUMP TEST1
        JUMP TEST2
        JUMP TEST3
        JUMP TEST4
        JUMP TEST5
        JUMP TEST6
        JUMP TEST7
        JUMP TEST8
        JUMP TEST9
        JUMP TEST10
        JUMP TEST11
        JUMP TEST12
        JUMP TEST13
        JUMP TEST14
        JUMP TEST15

HEX0201  .FILL x0201                
     
TEST0    ;; non-bypassed instructions		
                CONST R1 1
	        XOR R0 R0 R0
	        LD R3, HEX0201
		ADD R2 R1 R1
	        NOOP
	        NOOP
	        SRA R3 R3 R1
	        NOOP
	        NOOP
	        MUL R1 R2 R1
	        SRL R3 R3 R2

	        CONST R4 2
	        CONST R5 2
	        CONST R6 x40
	        NOOP
	        SUB R4 R1 R4
                SUB R5 R2 R5
	        SUB R6 R3 R6
	        OR R0 R4 R0
	        NOOP
	        NOOP
	        OR R5 R6 R5
	        NOOP
	        NOOP
	        NOOP
	        OR R0 R5 R0
	        NOOP
	        NOOP
	        NOOP
	        BRNP R0 FAIL0

	        CONST R0 1
	        JUMP WRITE_RESULT
FAIL0		CONST R0 0
         	JUMP WRITE_RESULT


TEST1	;; M->X bypassing
	                CONST R1 1
	                ADD R2 R1 R1
	                ADD R3 R2 R2
	                ADD R4 R3 R3
	                NOOP
	                NOOP
	                NOOP
	                INC R4 -8
	                NOOP
	                NOOP
	                NOOP
	                BRNP R4 FAIL1

	                CONST R0 1
                        JUMP WRITE_RESULT
	FAIL1           CONST R0 0
                        JUMP WRITE_RESULT


TEST2	;; W->X bypassing
	                CONST R1 1
	                CONST R2 3
	                ADD R3 R1 R1
	                MUL R4 R2 R2
	                ADD R5 R3 R3
	                ADD R6 R4 R4
	                NOOP
	                NOOP
	                NOOP
	                SUB R6 R6 R5
	                NOOP
	                INC R6 -14
	                NOOP
	                BRNP R6 FAIL2

	                CONST R0 1
	                JUMP WRITE_RESULT
	FAIL2           CONST R0 0
	                JUMP WRITE_RESULT


TEST3	;; M-X and W->X mixed, INC with special imm8 or dependent rd
	                XOR R0 R0 R0
	                NOT R1 R0
	                CONST R3 14
			LD R7 LEDADDR
	                SRL R1 R1 R3
	                SRA R2 R7 R1
	                SRL R1 R2 R1
	                INC R1 1
	                ADD R2 R1 R3
	                INC R1 80
	                INC R1 1
	                INC R1 1
	                INC R1 1
	                LD R2 HEX204C
	                NOOP
	                SUB R1 R1 R2
	                BRNP R1 FAIL3

	                CONST R0 1
                        JUMP WRITE_RESULT
	FAIL3           CONST R0 0
                        JUMP WRITE_RESULT


TEST4	;; register file bypasses
	                LD R6 LEDADDR
			LD R7 LEDADDR
	                LD R5 HEX204C
	                NOOP
	                INC R7 -1
	                INC R6 1
	                INC R5 -1
	                INC R7 -1
	                INC R6 1
	                INC R5 -1
	                SUB R4 R6 R7
	                INC R4 -4
	                LD R3 HEX204C
	                NOOP
	                SUB R2 R3 R5
	                INC R2 -2
	                OR R1 R2 R4
	                BRNP R1 FAIL4

	                CONST R0 1
                        JUMP WRITE_RESULT
	FAIL4           CONST R0 0
                        JUMP WRITE_RESULT
        

TEST5	;; stall on load
	                LD R6 HEX204C
	                ADD R6 R6 R6
	                LEA R5 LEDADDR
	                LDR R4 R5 1
	                INC R4 1
	                LD R3 HEX204C
	                NOOP
	                ADD R3 R3 R3
	                SUB R3 R6 R3
	                LD R2 HEX204C
	                NOOP
	                INC R2 1
	                SUB R2 R4 R2
	                OR R3 R2 R3
	                BRNP R3 FAIL5

	                CONST R0 1
                        JUMP WRITE_RESULT
	FAIL5           CONST R0 0
                        JUMP WRITE_RESULT
        

TEST6	;; stall on branch
	                CONST R1 1
	                CONST R6 12
	                CONST R3 14
	                CONST R0 0
	BRANCH1         SUB R6 R6 R1
	                SLL R5 R6 R3
	BRANCH2         NOT R5 R5
	                INC R0 1
	                BRN R5 BRANCH2
	                BRP R6 BRANCH1

	                INC R0 -18
	                BRNP R0 FAIL6

	                CONST R0 1
                        JUMP WRITE_RESULT
	FAIL6           CONST R0 0
                        JUMP WRITE_RESULT


TEST7	;; Cycle counter and instruction counter, load-use stall
			LD R4 CYCLE_CNT
			LD R5 INSN_CNT
			LDR R2 R4 0
			LDR R3 R5 0
			INC R3 6	; insn count
			INC R2 9	; cycle count
			NOOP
			NOOP
			NOOP 
			LDR R5 R5 0
			LDR R4 R4 0
			SUB R0 R2 R4
			SUB R1 R3 R5

			OR R0 R1 R0
			BRNP R0 FAIL7

			CONST R0 1
			JUMP WRITE_RESULT
	FAIL7		CONST R0 0			
			JUMP WRITE_RESULT


			
TEST8	;; Branch stall count
                        CONST R1 0
START_TEST8		BRZ R1 NEXT4
NEXT1			BRZ R1 NEXT5
NEXT2			BRZ R1 NEXT6
NEXT3			BRZ R1 NEXT7
NEXT4			BRZ R1 NEXT1
NEXT5			BRZ R1 NEXT2
NEXT6			BRZ R1 NEXT3
NEXT7			BRNP R1 ENDNEXT
			NOT R1 R1
			LD R4 CYCLE_CNT
			LDR R2 R4 0
			INC R2 28	; cycle count
			JUMP START_TEST8
ENDNEXT			LDR R4 R4 0

			SUB R0 R4 R2
			BRNP R0 FAIL8

			CONST R0 1
			JUMP WRITE_RESULT
	FAIL8		CONST R0 0
			JUMP WRITE_RESULT


TEST9	;; Load R0 followed by non-dependent NOT, LEA non-loadness
			LD R4 CYCLE_CNT
			LDR R2 R4 0
			LD R0 LEDADDR
			NOT R1 R2
			LEA R1 LEDADDR
			INC R1 1
			LDR R0 R1 0
			NOT R1 R2
			LDR R4 R4 0

			INC R2 7	; cycle_count
			SUB R0 R2 R4
			BRNP R0 FAIL9

			CONST R0 1
			JUMP WRITE_RESULT
	FAIL9		CONST R0 0
			JUMP WRITE_RESULT			



TEST10	;; JSR, JSRR R7
			CONST R1 3
TEST10_E
			LEA R7 ENTRYPOINT
			JSRR R7
ENTRYPOINT		INC R7 2
			JSRR R7
			INC R7 2
			JUMPR R7
			INC R1 -1
			BRNP R1 TEST10_E

			CONST R0 1
			JUMP WRITE_RESULT


TEST11	;; Loop with branch predictor flushed
			CONST R1 3
			CONST R0 0
TEST11_E		BRNP R0 TEST11_E
			BRNP R0 TEST11_E
			BRNP R0 TEST11_E
			BRNP R0 TEST11_E
			BRNP R0 TEST11_E
			BRNP R0 TEST11_E
			BRNP R0 TEST11_E
			BRNP R0 TEST11_E
			INC R1 -1
			BRP R1 TEST11_E

			CONST R0 1
			JUMP WRITE_RESULT

LEDADDR         .FILL xFE03
HEX204C         .FILL x204C
7SEGADDR        .FILL xFE04
CYCLE_CNT       .FILL xFF00
INSN_CNT        .FILL xFF01
LOADSTALL_CNT   .FILL xFF02
BRANCHSTALL_CNT .FILL xFF03

        
TEST12 ;; random instructions
RANDOM0200 INC R0, #-208
RANDOM0201 OR R5, R1, R3
RANDOM0202 AND R3, R4, R4
RANDOM0203 BRP R4, RANDOM0206
RANDOM0204 CONST R4, #176
RANDOM0205 OR R3, R2, R1
RANDOM0206 BRNZP R7, RANDOM020B
RANDOM0207 CONST R4, #-137
RANDOM0208 LEA R0, RANDOM0207
RANDOM0209 BRNZ R1, RANDOM020B
RANDOM020A LEA R4, RANDOM029D
RANDOM020B BRZ R5, RANDOM020D
RANDOM020C BRZ R6, RANDOM020F
RANDOM020D MUL R3, R5, R1
RANDOM020E CONST R4, #-156
RANDOM020F INC R0, #50
RANDOM0210 LEA R6, RANDOM022E
RANDOM0211 LD R3, RANDOM0266
RANDOM0212 SRL R3, R2, R3
RANDOM0213 LEA R1, RANDOM0313
RANDOM0214 INC R0, #3
RANDOM0215 INC R7, #136
RANDOM0216 BRP R3, RANDOM0218
RANDOM0217 ADD R1, R2, R6
RANDOM0218 BRNP R5, RANDOM021B
RANDOM0219 AND R5, R5, R5
RANDOM021A CONST R6, #183
RANDOM021B LD R2, RANDOM0204
RANDOM021C NOT R3, R5
RANDOM021D BRZ R2, RANDOM0222
RANDOM021E LEA R5, RANDOM0209
RANDOM021F BRNZ R7, RANDOM0221
RANDOM0220 BRZP R2, RANDOM0223
RANDOM0221 INC R3, #-129
RANDOM0222 LEA R0, RANDOM023C
RANDOM0223 SRA R3, R2, R5
RANDOM0224 SUB R0, R4, R5
RANDOM0225 LEA R4, RANDOM02A3
RANDOM0226 INC R5, #223
RANDOM0227 INC R0, #70
RANDOM0228 INC R3, #75
RANDOM0229 CONST R0, #-130
RANDOM022A BRZ R5, RANDOM022C
RANDOM022B INC R0, #-243
RANDOM022C LD R2, RANDOM029B
RANDOM022D BRNZP R0, RANDOM0231
RANDOM022E BRZ R3, RANDOM0233
RANDOM022F MUL R6, R0, R3
RANDOM0230 BRNZP R1, RANDOM0235
RANDOM0231 LEA R1, RANDOM02F3
RANDOM0232 INC R5, #-223
RANDOM0233 SRA R4, R2, R2
RANDOM0234 BRNZP R4, RANDOM0237
RANDOM0235 SRA R3, R3, R3
RANDOM0236 MUL R3, R0, R0
RANDOM0237 LEA R1, RANDOM02B1
RANDOM0238 INC R0, #167
RANDOM0239 CONST R6, #-105
RANDOM023A LEA R6, RANDOM02ED
RANDOM023B INC R7, #33
RANDOM023C LEA R3, RANDOM0284
RANDOM023D LD R5, RANDOM0253
RANDOM023E BRZ R1, RANDOM0240
RANDOM023F CONST R3, #-251
RANDOM0240 LEA R4, RANDOM033B
RANDOM0241 BRZP R1, RANDOM0245
RANDOM0242 CONST R1, #188
RANDOM0243 ADD R7, R5, R3
RANDOM0244 LEA R2, RANDOM023C
RANDOM0245 INC R6, #39
RANDOM0246 BRNZ R3, RANDOM024A
RANDOM0247 JUMP RANDOM024B
RANDOM0248 INC R6, #105
RANDOM0249 CONST R0, #-73
RANDOM024A BRZP R0, RANDOM024E
RANDOM024B SLL R3, R1, R0
RANDOM024C BRZP R6, RANDOM024F
RANDOM024D LD R1, RANDOM0280
RANDOM024E CONST R4, #-164
RANDOM024F INC R7, #242
RANDOM0250 LEA R0, RANDOM027D
RANDOM0251 BRNZ R0, RANDOM0254
RANDOM0252 INC R4, #-84
RANDOM0253 INC R3, #-59
RANDOM0254 ADD R0, R0, R4
RANDOM0255 BRNZP R7, RANDOM025A
RANDOM0256 CONST R2, #-88
RANDOM0257 LEA R4, RANDOM02D9
RANDOM0258 OR R2, R4, R3
RANDOM0259 BRZ R2, RANDOM025C
RANDOM025A BRP R4, RANDOM025E
RANDOM025B JSR RANDOM025E
RANDOM025C LEA R7, RANDOM02FE
RANDOM025D CONST R2, #-217
RANDOM025E INC R2, #-90
RANDOM025F LEA R0, RANDOM02E8
RANDOM0260 BRNP R6, RANDOM0264
RANDOM0261 LD R2, RANDOM0208
RANDOM0262 INC R4, #-256
RANDOM0263 CONST R0, #24
RANDOM0264 LD R5, RANDOM02DC
RANDOM0265 CONST R3, #-227
RANDOM0266 INC R4, #-138
RANDOM0267 BRNZ R5, RANDOM026B
RANDOM0268 CONST R3, #69
RANDOM0269 BRZ R4, RANDOM026E
RANDOM026A INC R4, #191
RANDOM026B ST R0, RANDOM022D
RANDOM026C BRNP R3, RANDOM0271
RANDOM026D CONST R1, #-79
RANDOM026E CONST R5, #-115
RANDOM026F LEA R7, RANDOM029D
RANDOM0270 SLL R3, R5, R1
RANDOM0271 JUMP RANDOM0276
RANDOM0272 SRA R5, R5, R2
RANDOM0273 ADD R6, R7, R2
RANDOM0274 BRZP R0, RANDOM0276
RANDOM0275 LD R3, RANDOM0211
RANDOM0276 BRNZ R1, RANDOM0279
RANDOM0277 LEA R0, RANDOM02A6
RANDOM0278 LEA R5, RANDOM0276
RANDOM0279 INC R0, #-51
RANDOM027A BRN R1, RANDOM027F
RANDOM027B BRZP R1, RANDOM027D
RANDOM027C SLL R0, R5, R3
RANDOM027D LEA R4, RANDOM033B
RANDOM027E JUMP RANDOM0283
RANDOM027F BRNZP R4, RANDOM0283
RANDOM0280 ADD R5, R4, R3
RANDOM0281 CONST R0, #-64
RANDOM0282 CONST R7, #187
RANDOM0283 CONST R3, #-142
RANDOM0284 CONST R2, #-196
RANDOM0285 SUB R5, R0, R2
RANDOM0286 CONST R1, #120
RANDOM0287 BRNP R1, RANDOM028C
RANDOM0288 INC R7, #152
RANDOM0289 BRN R2, RANDOM028D
RANDOM028A OR R7, R1, R6
RANDOM028B INC R7, #-230
RANDOM028C BRN R3, RANDOM028E
RANDOM028D INC R1, #-175
RANDOM028E BRZP R6, RANDOM0293
RANDOM028F CONST R7, #-60
RANDOM0290 OR R7, R0, R7
RANDOM0291 NOT R6, R0
RANDOM0292 CONST R1, #136
RANDOM0293 SRL R1, R6, R0
RANDOM0294 INC R7, #-57
RANDOM0295 INC R1, #69
RANDOM0296 LEA R4, RANDOM033F
RANDOM0297 CONST R3, #-69
RANDOM0298 LEA R4, RANDOM02AB
RANDOM0299 CONST R2, #241
RANDOM029A LEA R1, RANDOM02A6
RANDOM029B CONST R7, #-156
RANDOM029C SUB R4, R5, R6
RANDOM029D INC R7, #187
RANDOM029E SRL R2, R4, R1
RANDOM029F LD R0, RANDOM02C2
RANDOM02A0 BRNZP R6, RANDOM02A3
RANDOM02A1 BRNZP R5, RANDOM02A4
RANDOM02A2 BRP R3, RANDOM02A5
RANDOM02A3 MUL R7, R2, R6
RANDOM02A4 CONST R1, #247
RANDOM02A5 BRZP R7, RANDOM02A7
RANDOM02A6 CONST R4, #174
RANDOM02A7 BRNP R4, RANDOM02A9
RANDOM02A8 LEA R5, RANDOM02D6
RANDOM02A9 CONST R2, #-236
RANDOM02AA CONST R4, #-157
RANDOM02AB INC R5, #-164
RANDOM02AC BRP R7, RANDOM02B0
RANDOM02AD CONST R1, #-50
RANDOM02AE SLL R7, R4, R6
RANDOM02AF LEA R0, RANDOM030A
RANDOM02B0 CONST R0, #-196
RANDOM02B1 LD R0, RANDOM0297
RANDOM02B2 BRP R7, RANDOM02B5
RANDOM02B3 LEA R7, RANDOM032C
RANDOM02B4 BRNZ R6, RANDOM02B6
RANDOM02B5 LEA R0, RANDOM0383
RANDOM02B6 BRZ R6, RANDOM02B9
RANDOM02B7 SLL R7, R7, R0
RANDOM02B8 LD R1, RANDOM02E3
RANDOM02B9 INC R4, #-247
RANDOM02BA ST R1, RANDOM029C
RANDOM02BB ADD R2, R2, R1
RANDOM02BC LEA R5, RANDOM02EA
RANDOM02BD LD R1, RANDOM02BC
RANDOM02BE SRL R6, R1, R2
RANDOM02BF BRNZ R4, RANDOM02C4
RANDOM02C0 ADD R4, R2, R5
RANDOM02C1 CONST R2, #-77
RANDOM02C2 LEA R4, RANDOM0211
RANDOM02C3 INC R7, #-68
RANDOM02C4 CONST R2, #54
RANDOM02C5 OR R3, R1, R7
RANDOM02C6 LEA R6, RANDOM02A3
RANDOM02C7 BRN R3, RANDOM02CA
RANDOM02C8 LEA R0, RANDOM0360
RANDOM02C9 BRNP R1, RANDOM02CB
RANDOM02CA MUL R2, R0, R7
RANDOM02CB LEA R4, RANDOM03AA
RANDOM02CC INC R7, #-13
RANDOM02CD CONST R4, #49
RANDOM02CE BRNP R5, RANDOM02D3
RANDOM02CF AND R6, R6, R4
RANDOM02D0 BRZ R4, RANDOM02D4
RANDOM02D1 INC R2, #-217
RANDOM02D2 INC R1, #-70
RANDOM02D3 BRP R1, RANDOM02D5
RANDOM02D4 LEA R6, RANDOM026A
RANDOM02D5 SLL R0, R1, R4
RANDOM02D6 BRN R3, RANDOM02DA
RANDOM02D7 CONST R4, #223
RANDOM02D8 INC R6, #109
RANDOM02D9 BRP R7, RANDOM02DE
RANDOM02DA SRL R2, R6, R3
RANDOM02DB LD R3, RANDOM0398
RANDOM02DC INC R1, #115
RANDOM02DD BRZ R0, RANDOM02E0
RANDOM02DE BRZ R3, RANDOM02E0
RANDOM02DF ST R4, RANDOM020B
RANDOM02E0 CONST R6, #-231
RANDOM02E1 BRNP R0, RANDOM02E6
RANDOM02E2 LEA R0, RANDOM02D7
RANDOM02E3 CONST R7, #-14
RANDOM02E4 SLL R7, R2, R0
RANDOM02E5 LEA R7, RANDOM02A5
RANDOM02E6 LEA R1, RANDOM02F9
RANDOM02E7 LD R2, RANDOM03C5
RANDOM02E8 LD R7, RANDOM0212
RANDOM02E9 SUB R3, R4, R0
RANDOM02EA LEA R0, RANDOM03B6
RANDOM02EB INC R7, #-125
RANDOM02EC BRN R7, RANDOM02EF
RANDOM02ED LD R0, RANDOM03B4
RANDOM02EE LEA R5, RANDOM029F
RANDOM02EF BRNZ R4, RANDOM02F4
RANDOM02F0 BRN R2, RANDOM02F5
RANDOM02F1 LEA R5, RANDOM022C
RANDOM02F2 LEA R1, RANDOM03E8
RANDOM02F3 BRNP R1, RANDOM02F8
RANDOM02F4 CONST R0, #199
RANDOM02F5 LEA R2, RANDOM0282
RANDOM02F6 BRN R4, RANDOM02FB
RANDOM02F7 OR R0, R6, R4
RANDOM02F8 LEA R2, RANDOM0219
RANDOM02F9 CONST R0, #125
RANDOM02FA INC R1, #22
RANDOM02FB CONST R6, #-33
RANDOM02FC ADD R1, R6, R1
RANDOM02FD OR R1, R5, R7
RANDOM02FE LD R4, RANDOM027A
RANDOM02FF XOR R7, R7, R6
RANDOM0300 MUL R1, R2, R5
RANDOM0301 LD R2, RANDOM021D
RANDOM0302 ST R0, RANDOM020D
RANDOM0303 BRNZP R7, RANDOM0305
RANDOM0304 LEA R5, RANDOM0294
RANDOM0305 LD R6, RANDOM0303
RANDOM0306 BRNZ R3, RANDOM0309
RANDOM0307 INC R4, #243
RANDOM0308 CONST R5, #101
RANDOM0309 LEA R7, RANDOM036F
RANDOM030A ADD R0, R4, R5
RANDOM030B LD R3, RANDOM0319
RANDOM030C LEA R5, RANDOM0237
RANDOM030D BRNZ R3, RANDOM0310
RANDOM030E NOT R2, R0
RANDOM030F LD R0, RANDOM039E
RANDOM0310 ADD R2, R5, R6
RANDOM0311 CONST R3, #140
RANDOM0312 SUB R2, R0, R5
RANDOM0313 AND R7, R0, R6
RANDOM0314 SRA R1, R0, R6
RANDOM0315 LD R2, RANDOM02F3
RANDOM0316 MUL R7, R1, R6
RANDOM0317 INC R0, #143
RANDOM0318 BRN R3, RANDOM031D
RANDOM0319 INC R1, #95
RANDOM031A BRNZP R2, RANDOM031E
RANDOM031B CONST R5, #16
RANDOM031C NOT R4, R3
RANDOM031D LEA R4, RANDOM0319
RANDOM031E LD R5, RANDOM0221
RANDOM031F SUB R6, R6, R4
RANDOM0320 CONST R3, #-90
RANDOM0321 LD R1, RANDOM0389
RANDOM0322 BRNP R4, RANDOM0325
RANDOM0323 INC R7, #-173
RANDOM0324 ST R6, RANDOM0268
RANDOM0325 LD R5, RANDOM03F8
RANDOM0326 BRN R2, RANDOM0328
RANDOM0327 LEA R3, RANDOM032A
RANDOM0328 BRZ R6, RANDOM032D
RANDOM0329 LEA R4, RANDOM0397
RANDOM032A ADD R1, R1, R1
RANDOM032B INC R5, #109
RANDOM032C LD R6, RANDOM0332
RANDOM032D INC R3, #-117
RANDOM032E BRZ R6, RANDOM0332
RANDOM032F XOR R4, R4, R5
RANDOM0330 BRNZ R1, RANDOM0334
RANDOM0331 CONST R1, #-215
RANDOM0332 LD R7, RANDOM0236
RANDOM0333 INC R7, #181
RANDOM0334 LD R0, RANDOM0307
RANDOM0335 INC R3, #-130
RANDOM0336 LEA R0, RANDOM0354
RANDOM0337 LEA R7, RANDOM024A
RANDOM0338 BRNZ R0, RANDOM033A
RANDOM0339 LEA R7, RANDOM03CD
RANDOM033A BRZ R4, RANDOM033E
RANDOM033B OR R2, R5, R2
RANDOM033C ST R7, RANDOM0264
RANDOM033D BRP R7, RANDOM033F
RANDOM033E XOR R1, R6, R6
RANDOM033F INC R7, #46
RANDOM0340 LEA R0, RANDOM036B
RANDOM0341 LEA R7, RANDOM02FF
RANDOM0342 BRZP R6, RANDOM0344
RANDOM0343 BRNP R1, RANDOM0348
RANDOM0344 LEA R0, RANDOM02D1
RANDOM0345 SRA R4, R1, R0
RANDOM0346 LD R6, RANDOM02A2
RANDOM0347 LD R6, RANDOM028A
RANDOM0348 OR R0, R3, R1
RANDOM0349 LD R7, RANDOM0261
RANDOM034A BRNZP R7, RANDOM034F
RANDOM034B BRNZ R3, RANDOM034E
RANDOM034C XOR R0, R6, R1
RANDOM034D CONST R0, #-148
RANDOM034E CONST R7, #-100
RANDOM034F INC R7, #88
RANDOM0350 BRP R6, RANDOM0353
RANDOM0351 JUMP RANDOM0354
RANDOM0352 LD R6, RANDOM0271
RANDOM0353 BRP R3, RANDOM0355
RANDOM0354 BRP R5, RANDOM0359
RANDOM0355 LEA R4, RANDOM0344
RANDOM0356 INC R4, #227
RANDOM0357 BRNP R5, RANDOM035C
RANDOM0358 BRZ R1, RANDOM035D
RANDOM0359 INC R2, #-197
RANDOM035A LD R0, RANDOM03CD
RANDOM035B INC R2, #-63
RANDOM035C ADD R0, R0, R5
RANDOM035D ST R3, RANDOM0286
RANDOM035E CONST R2, #117
RANDOM035F SUB R1, R5, R5
RANDOM0360 LEA R4, RANDOM030C
RANDOM0361 BRNZP R7, RANDOM0366
RANDOM0362 CONST R6, #-145
RANDOM0363 CONST R7, #105
RANDOM0364 XOR R3, R7, R5
RANDOM0365 INC R4, #-239
RANDOM0366 BRP R1, RANDOM036B
RANDOM0367 LEA R5, RANDOM02FC
RANDOM0368 XOR R7, R0, R6
RANDOM0369 INC R3, #-60
RANDOM036A CONST R2, #139
RANDOM036B LD R5, RANDOM038F
RANDOM036C BRP R4, RANDOM036F
RANDOM036D LEA R1, RANDOM0282
RANDOM036E SUB R2, R4, R4
RANDOM036F INC R1, #-62
RANDOM0370 CONST R4, #5
RANDOM0371 LEA R4, RANDOM0336
RANDOM0372 XOR R1, R2, R2
RANDOM0373 BRNZP R2, RANDOM0375
RANDOM0374 BRNP R5, RANDOM0378
RANDOM0375 LD R0, RANDOM0282
RANDOM0376 CONST R0, #220
RANDOM0377 LEA R4, RANDOM0335
RANDOM0378 LEA R6, RANDOM034A
RANDOM0379 BRZ R0, RANDOM037D
RANDOM037A XOR R5, R6, R5
RANDOM037B LEA R2, RANDOM02FE
RANDOM037C INC R4, #23
RANDOM037D INC R5, #220
RANDOM037E LEA R0, RANDOM03A7
RANDOM037F ST R1, RANDOM02B4
RANDOM0380 INC R5, #-181
RANDOM0381 CONST R1, #236
RANDOM0382 ST R2, RANDOM0314
RANDOM0383 LEA R2, RANDOM02AB
RANDOM0384 LD R4, RANDOM0337
RANDOM0385 BRNP R3, RANDOM0387
RANDOM0386 INC R0, #-90
RANDOM0387 ADD R5, R6, R2
RANDOM0388 CONST R7, #18
RANDOM0389 MUL R1, R6, R1
RANDOM038A SRL R4, R4, R6
RANDOM038B INC R6, #-246
RANDOM038C LD R7, RANDOM02E0
RANDOM038D LEA R0, RANDOM0331
RANDOM038E BRNZP R0, RANDOM0393
RANDOM038F CONST R2, #102
RANDOM0390 INC R7, #-32
RANDOM0391 CONST R5, #2
RANDOM0392 LEA R2, RANDOM036F
RANDOM0393 CONST R7, #1
RANDOM0394 INC R1, #-186
RANDOM0395 CONST R7, #90
RANDOM0396 LD R4, RANDOM0359
RANDOM0397 AND R1, R1, R6
RANDOM0398 ST R6, RANDOM02B3
RANDOM0399 CONST R1, #100
RANDOM039A LD R0, RANDOM02CD
RANDOM039B ST R0, RANDOM02E3
RANDOM039C XOR R2, R3, R2
RANDOM039D CONST R3, #235
RANDOM039E MUL R7, R2, R2
RANDOM039F INC R3, #23
RANDOM03A0 LD R0, RANDOM02AA
RANDOM03A1 LD R0, RANDOM0346
RANDOM03A2 LEA R3, RANDOM0391
RANDOM03A3 LD R3, RANDOM02BF
RANDOM03A4 INC R0, #24
RANDOM03A5 BRNZP R1, RANDOM03A8
RANDOM03A6 CONST R2, #138
RANDOM03A7 LEA R1, RANDOM0391
RANDOM03A8 LEA R4, RANDOM0365
RANDOM03A9 OR R4, R3, R0
RANDOM03AA CONST R4, #219
RANDOM03AB INC R5, #189
RANDOM03AC LEA R3, RANDOM02BB
RANDOM03AD LD R5, RANDOM035F
RANDOM03AE SLL R2, R6, R0
RANDOM03AF BRP R6, RANDOM03B4
RANDOM03B0 BRNZP R0, RANDOM03B3
RANDOM03B1 LEA R4, RANDOM02BE
RANDOM03B2 MUL R4, R0, R2
RANDOM03B3 INC R5, #255
RANDOM03B4 LEA R4, RANDOM031E
RANDOM03B5 LD R3, RANDOM03AD
RANDOM03B6 LD R1, RANDOM0372
RANDOM03B7 LD R1, RANDOM02FC
RANDOM03B8 SRL R7, R3, R0
RANDOM03B9 LD R1, RANDOM02E7
RANDOM03BA LD R7, RANDOM0392
RANDOM03BB LD R5, RANDOM039D
RANDOM03BC ST R5, RANDOM0370
RANDOM03BD LD R4, RANDOM037F
RANDOM03BE CONST R2, #-124
RANDOM03BF LD R2, RANDOM037D
RANDOM03C0 BRN R4, RANDOM03C3
RANDOM03C1 INC R6, #-249
RANDOM03C2 INC R1, #-51
RANDOM03C3 XOR R3, R1, R7
RANDOM03C4 LEA R7, RANDOM03E5
RANDOM03C5 LD R6, RANDOM0334
RANDOM03C6 BRP R0, RANDOM03CA
RANDOM03C7 ST R7, RANDOM0355
RANDOM03C8 SUB R2, R0, R4
RANDOM03C9 CONST R4, #223
RANDOM03CA ADD R2, R6, R0
RANDOM03CB LD R2, RANDOM02EA
RANDOM03CC INC R2, #-76
RANDOM03CD ST R7, RANDOM031B
RANDOM03CE NOT R3, R1
RANDOM03CF LD R7, RANDOM03C9
RANDOM03D0 INC R4, #-224
RANDOM03D1 BRZ R7, RANDOM03D3
RANDOM03D2 INC R2, #227
RANDOM03D3 INC R0, #-133
RANDOM03D4 CONST R7, #-225
RANDOM03D5 INC R3, #-252
RANDOM03D6 LEA R5, RANDOM0318
RANDOM03D7 LEA R1, RANDOM038D
RANDOM03D8 LD R5, RANDOM03DE
RANDOM03D9 INC R5, #218
RANDOM03DA CONST R4, #-149
RANDOM03DB LEA R4, RANDOM03BD
RANDOM03DC SLL R1, R7, R0
RANDOM03DD BRNZP R3, RANDOM03E1
RANDOM03DE CONST R2, #-149
RANDOM03DF CONST R0, #139
RANDOM03E0 ST R6, RANDOM0346
RANDOM03E1 BRNZP R1, RANDOM03E4
RANDOM03E2 INC R3, #237
RANDOM03E3 BRNZP R2, RANDOM03E6
RANDOM03E4 BRZ R7, RANDOM03E8
RANDOM03E5 LD R3, RANDOM03B3
RANDOM03E6 INC R4, #-130
RANDOM03E7 INC R6, #4
RANDOM03E8 LEA R5, RANDOM038C
RANDOM03E9 JUMP RANDOM03EC
RANDOM03EA BRP R3, RANDOM03ED
RANDOM03EB INC R5, #37
RANDOM03EC CONST R6, #68
RANDOM03ED SLL R2, R2, R1
RANDOM03EE INC R6, #236
RANDOM03EF BRNP R2, RANDOM03F1
RANDOM03F0 CONST R0, #198
RANDOM03F1 LD R6, RANDOM0312
RANDOM03F2 BRZ R4, RANDOM03F7
RANDOM03F3 INC R3, #-109
RANDOM03F4 LEA R1, RANDOM037B
RANDOM03F5 BRZ R4, RANDOM03FA
RANDOM03F6 BRZ R3, RANDOM03FB
RANDOM03F7 OR R4, R5, R1
RANDOM03F8 BRNP R6, RANDOM03FD
RANDOM03F9 SLL R0, R7, R3
RANDOM03FA LD R1, RANDOM036B
RANDOM03FB INC R6, #-138
RANDOM03FC BRNZ R0, RANDOM03FF
RANDOM03FD LEA R2, RANDOM0320
RANDOM03FE LEA R7, RANDOM034E
RANDOM03FF AND R6, R4, R3
;;; verify register values
        ST R7 SAVE_R7
        ;; check R0
        LD R7 CORRECT_R0
        SUB R7 R0 R7
        BRNP R7 FAIL12
        ;; check R1
        LD R7 CORRECT_R1
        SUB R7 R1 R7
        BRNP R7 FAIL12
        ;; check R2
        LD R7 CORRECT_R2
        SUB R7 R2 R7
        BRNP R7 FAIL12
        ;; check R3
        LD R7 CORRECT_R3
        SUB R7 R3 R7
        BRNP R7 FAIL12
        ;; check R4
        LD R7 CORRECT_R4
        SUB R7 R4 R7
        BRNP R7 FAIL12
        ;; check R5
        LD R7 CORRECT_R5
        SUB R7 R5 R7
        BRNP R7 FAIL12
        ;; check R6
        LD R7 CORRECT_R6
        SUB R7 R6 R7
        BRNP R7 FAIL12
        ;; check R7
        LD R0 CORRECT_R7
        LD R7 SAVE_R7
        SUB R0 R7 R0
        BRNP R0 FAIL12
        CONST R0 1
        JUMP WRITE_RESULT
        
FAIL12  CONST R0 0
        JUMP WRITE_RESULT                

;;; unimplemented test targets
TEST13
TEST14
TEST15 

SAVE_R7         .FILL x0000
;;; hard-coded values for the regfile after the random-insn test
CORRECT_R0      .FILL xECEE
CORRECT_R1      .FILL x0484
CORRECT_R2      .FILL x0429
CORRECT_R3      .FILL xAA92
CORRECT_R4      .FILL x0495
CORRECT_R5      .FILL x0495
CORRECT_R6      .FILL x0090
CORRECT_R7      .FILL x0457

SWITCHESADDR2    .FILL xFE05                        
LEDADDR2         .FILL xFE03	
7SEGADDR2        .FILL xFE04
CYCLE_CNT2       .FILL xFF00
INSN_CNT2        .FILL xFF01
LOADSTALL_CNT2   .FILL xFF02
BRANCHSTALL_CNT2 .FILL xFF03
        

;;; Writes the result of the test to the expansion LEDs, and prints
;;; the number of stall cycles to the 7-segment display
;;;    input - R0 ( '0' for a test failure, '1' for a pass )
;;;    output - '1' for failure, '15' for pass written to LEDs
WRITE_RESULT
        BRZ R0, FAILED
        NOOP
        NOOP        
PASSED  CONST R4, 15
        NOOP
        NOOP
        JUMP SETLED
        NOOP
        NOOP
FAILED  CONST R4, 1
        NOOP
        NOOP
SETLED  LD R5, LEDADDR2
        NOOP
        NOOP
        STR R4, R5, 0
        NOOP
        NOOP
;;; R0 <- stall cycles
;;; R1 <- total cycles
;;; R2 <- total insns
;;; R3 <- load-use cycles
;;; R4 <- branch-mispredict cycles
SAVE_CYCLE_COUNTS
        LD R7, CYCLE_CNT2
        NOOP
        NOOP
        LDR R1, R7, 0
        NOOP
        NOOP
        LD R7, INSN_CNT2
        NOOP
        NOOP
        LDR R2, R7, 0
        NOOP
        NOOP
        SUB R0, R1, R2
        NOOP
        NOOP
        LD R7, LOADSTALL_CNT2
        NOOP
        NOOP
        LDR R3, R7, 0
        NOOP
        NOOP
        LD R7, BRANCHSTALL_CNT2
        NOOP
        NOOP
        LDR R4, R7, 0
        NOOP
        NOOP
        
POLL
        LD R6, SWITCHESADDR2
        NOOP
        NOOP
        LDR R6, R6, 0           ; R6 <- current value of switches
        NOOP
        NOOP
INSNS   LD R7, PRINT_INSNS
        NOOP
        NOOP
        SUB R7, R6, R7
        NOOP
        NOOP
        BRNP R7, CYCLES
        NOOP
        NOOP
        LD R7, 7SEGADDR2
        NOOP
        NOOP
        STR R2, R7, 0
        NOOP
        NOOP
        JUMP POLL
CYCLES  LD R7, PRINT_CYCLES
        NOOP
        NOOP
        SUB R7, R6, R7
        NOOP
        NOOP
        BRNP R7, LOADS
        NOOP
        NOOP
        LD R7, 7SEGADDR2
        NOOP
        NOOP
        STR R1, R7, 0
        NOOP
        NOOP
        JUMP POLL
LOADS   LD R7, PRINT_LOADS
        NOOP
        NOOP
        SUB R7, R6, R7
        NOOP
        NOOP
        BRNP R7, BRANCHES
        NOOP
        NOOP
        LD R7, 7SEGADDR2
        NOOP
        NOOP
        STR R3, R7, 0
        NOOP
        NOOP
        JUMP POLL
BRANCHES LD R7, PRINT_BRANCHES
        NOOP
        NOOP
        SUB R7, R6, R7
        NOOP
        NOOP
        BRNP R7, STALLS
        NOOP
        NOOP
        LD R7, 7SEGADDR2
        NOOP
        NOOP
        STR R4, R7, 0
        NOOP
        NOOP
        JUMP POLL
STALLS  LD R7, 7SEGADDR2
        NOOP
        NOOP
        STR R0, R7, 0
        NOOP
        NOOP
        JUMP POLL

PRINT_INSNS     .FILL x0001
PRINT_CYCLES    .FILL x0002
PRINT_LOADS     .FILL x0004
PRINT_BRANCHES  .FILL x0008
        
END		.END
